MEDIA ALERT: Oski Technology’s Formal Verification Expertise Highlighted at DVCon with Booth Demonstrations, Technical, Poster Session Presentations, Formal Leadership Summit

World News: . []

SAN JOSE, Calif., Feb. 13, 2018 (GLOBE NEWSWIRE) --

Brian Bailey, technology editor at Semiconductor Engineering, will moderate a panel of experts that includes Vigyan Singhal, Oski’s president and chief executive officer, titled, “,” to identify best practices for using verification methodologies. It will be held Wednesday at 8:30 a.m. to 9:30 a.m.

During a session titled, “,” Singhal will present with Qualcomm “Architectural Formal Verification of System-Level Deadlocks.” This session will be held Wednesday from 10 a.m. until noon.

Oski user Saurabh Shrivastava, senior manager Hardware Engineering at Cavium, will provide a case study titled, “Formal Verification of Silicon for Software Defined Networking,” during the from 10:30 a.m. until noon.

For the third consecutive year, Oski will host the Formal Leadership Summit Wednesday evening where leaders in Formal Verification will discuss the way Formal affects verification.  This year’s summit will explore how Formal is driving verification sign-off for designs across the industry.  Experts will address trends where applications are finding success with Formal, how adoption is growing and current challenges facing engineers. A post event summary will be published.


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Globe Newswire: 16:00 GMT Tuesday 13th February 2018

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